Analog hardware systems are emerging as an important class of computing devices for neural network implementations. However, one of the major needs currently facing neural network researchers remains the nonvolatile synaptic storage of analog synaptic weights. (J. Alspector, et al., "A Neuromorphic VLSI Learning System," Proceedings of the 1987 Stanford Conference, Advanced Research in VLSI, pp. 313-349, 1987.)
A nonvolatile synaptic cell can be made significantly more compact than other "volatile" synaptic cells, such as, for example, those based on a capacitor refresh scheme. (S. Eberhardt, T. Duong, A. Thakoor, "A VLSI Analog Synapse Building-Block Chip for Hardware Neural Network Implementations," Proceedings of the Third Annual Parallel Processing Symposium, Fullerton, CA, Mar. 29-31, 1989.) From a practical point of view, both the on-chip and off-chip download and interface circuitry should be considerably simplified.
The fully analog nature of simplified synaptic cell circuits should make them ideal for implementation of on-chip learning systems. Moreover, once learning has been achieved, there is a practical need for these neural network systems to be powered down without the loss of information content embedded in the synaptic weights. Consequently, there is a need for such simplified circuits for neural network architectures.
Various implementations of nonvolatile synaptic cells using "floating gate" technology have surfaced in the literature. (M. Holler, S. Tam, H. Castro and R. Benson, "An Electrically Trainable Artificial Neural Network (ETANN) with 10240 "Floating Gate" Synapses," preprint.) The underlying physical phenomenon for charge storage and removal relies on some form of tunneling-injection across an oxide barrier. Specialized processing techniques are required, and consequently, they are costly. Therefore they are traditionally reserved for industrial in-house research and development leading to commercial products. An example of this is Intel's ETANN chip. (Holler, et al., supra.)
The use of UV radiation for analog storage is extensively reviewed by D.A. Kerns, J.E. Tanner, M.A. Silvilotti and J. Luo, "CMOS UV-Writable No-Volatile Analog Storage," (to appear in the Proceedings of Advanced Research in VLSI: International Conference 1991, Santa Cruz, California), and it is shown that charge leakage from the floating-gate capacitance can for all practical purposes be considered to be negligible.